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DATA SHEET
CX77301: PA Module Dual-band EGSM900 DCS1800 / GPRS
APPLICATIONS
* Dual-band cellular handsets
encompassing - Class 4 EGSM900, - Class 1 DCS1800 - up to Class 10 GPRS multi-slot operation.
The CX77301 is a dual-band Power Amplifier Module (PAM) designed in a compact form factor for Class 4 EGSM900 and Class 1 DCS1800 operation that also supports multi-slot transmission for Class 10 General Packet Radio Service (GPRS) operation. The module consists of an EGSM900 PA block, a DCS1800 PA block, impedance matching circuitry for 50 input and output impedances, and bias control circuitry. Two separate Heterojunction Bipolar Transistor (HBT) PA blocks are fabricated on a single Gallium Arsenide (GaAs) die. One PA block operates in the EGSM900 band and the other PA block supports the DCS1800 band. Optimized for lithium ion battery operation, both PA blocks share common power supply pins to distribute current. A custom CMOS integrated circuit provides the internal interface circuitry, including a current amplifier that minimizes the required power control current (IAPC) to 10 A, typical. The GaAs die, the Silicon (Si) die, and passive components are mounted on a multi-layer laminate substrate. The assembly is encapsulated with plastic overmold. The RF input and output ports are internally matched to 50 to reduce the number of external components for a dual-band design. Extremely low leakage current (2 A, typical) of the dual PA module maximizes handset standby time. The CX77301 also contains bandselect switching circuitry to select EGSM (logic 0) or DCS (logic 1) as determined from the Band Select (BS) signal. In the Functional Block Diagram shown below, the BS pin selects the PA output (DCS OUT or EGSM OUT) while the Analog Power Control (APC) controls the level of output power.
FEATURES
* High efficiency * * *
*
- EGSM 55% - DCS 50% Input/output matching - 50 internal Small outline 9.1 mm x 11.6 mm Low profile 1.5 mm maximum Low APC current 10 A typical
DCS IN
Match
Match
DCS OUT
Power Control Band Select
CMOS Bias Controller Match
HBT
EGSM IN
Match
EGSM OUT
100956_001
Figure 1. Functional Block Diagram
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Data Sheet * CX77301
PA Module for Dual-band EGSM900 DCS1800 / GPRS
ELECTRICAL SPECIFICATIONS SPECIFICA TIONS
The following tables list the electrical characteristics of the CX77301 Power Amplifier. Table 1 lists the absolute maximum ratings and Table 2 shows the recommended operating conditions. Table 3 shows the electrical characteristics of the CX77301 for EGSM and DSC modes. A typical CX77301 application diagram appears in Figure 2. The CX77301 is a static-sensitive electronic device and should not be stored or operated near strong electrostatic fields. Detailed ESD precautions along with information on device dimensions, pin descriptions, packaging and handling can be found in later sections of this data sheet.
Table 1. Absolute Maximum Ratings
Parameter
Input power (PIN) Supply voltage (VCC), standby, VAPC 0.3 V Control voltage (VAPC) Storage Temperature
Minimum
-- -- -0.5 -55
Maximum
15 7 VCC_MAX - 0.2 (See Table 3) +100
Unit
dBm V V C
Conditions Table 2. CX77301 Recommended Operating Conditions
Parameter
Supply Voltage (VCC) Supply Current (ICC) Operating Case Temperature (TCASE) 1-Slot (12.5% duty cycle) 2-Slot (25% duty cycle) 3-Slot (37.5% duty cycle) 4-Slot ( 50% duty cycle)
(1)
Minimum
2.9 0 -20 -20 -20 -20
Typical
3.5 -- -- -- -- --
Maximum
4.8 V(1) 2.5
(1)
Unit
V A
100 90 75 60 C
For charging conditions with VCC > 4.8 V, derate ICC linearly down to 0.5 A max at VCC = 5.5 V
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PA Module for Dual-band EGSM900 DCS1800 / GPRS
T able 3. CX77301 Electrical Specifications(1) (1 of 3) Specifications (1)
Data Sheet * CX77301
Parameter
Symbol Symbol
Test Condition General
Min
Typical
Max
Units
Supply Voltage Power Control Current
VCC IAPC VCC = 4.5 V VAPC = 0.3 V TCASE = +25 C PIN -60 dBm
-- --
2.9 --
3.5 10
4.8V 100
V A A mV s
Leakage Current
IQ
--
--
5
APC Enable Threshold APC Enable Switching Delay
VAPCTH SW
-- Time from VAPC VAPCTH until POUT (POUT_FINAL -3 dB)
200 5
--
600 8
EGSM Mode (f = 880 to 915 MHz and PIN = 6 to 12 dBm)
Frequency Range Input Power Analog Power Control Voltage f PIN VAPC POUT = 32 dBm VCC = 3.5 V POUT 34.5 dBm VAPC 2.0 V pulse width = 577 s duty cycle = 1:8 TCASE = +25 C BW = 3 MHz 5 dBm POUT 35 dBm VCC = 3.5 V VAPC 2.0 V TCASE = +25 C VCC = 2.9 V VAPC 2.6 V TCASE = -20 C to +100 C (See Table 2 for multi-slot) PIN = 6 dBm VCC = 4.8 V VAPC 2.6 V TCASE = -20 C to +100 C (See Table 2 for multi-slot) PIN = 6 dBm POUT = 5 to 35 dBm, controlled by VAPC PIN = 12 dBm VAPC = 0.3 V Time from POUT = -10 dBm to POUT = +5 dBm, 90% Switching Time RISE, FALL Time from POUT = -10 dBm to POUT = +20 dBm, 90% Time from POUT = -10 dBm to POUT = +34.5 dBm, 90% -- -- 880 6 1.2 -- -- 1.7 915 12 2.1 MHz dBm V
Power Added Efficiency
PAE
50
55
--
%
2nd to 13th Harmonics
2f0 to 13f0
--
--
-7
dBm
POUT
34.5
35.0
--
POUT MAX Output Power
32
33
-- dBm
POUT MAX
32
33
--
Input VSWR Forward Isolation
IN POUT STANDBY
-- -- -- -- --
1.5:1 -35 5 5 2
2:1 -30 8 8 4
-- dBm
s
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Data Sheet * CX77301
PA Module for Dual-band EGSM900 DCS1800 / GPRS
Specifications(1) Table 3. CX77301 Electrical Specifications (1) (2 of 3)
Parameter
Symbol
Test Condition
All combinations of the following parameters: VAPC = Controlled (2) PIN = Min. to Max. VCC = 2.9 V to 4.8 V Load VSWR = 8:1, all phase angles All combinations of the following parameters: VAPC = Controlled (2) PIN = Min. to Max. VCC = 2.9 V to 4.8 V Load VSWR = 10:1, all phase angles At f0 + 20 MHz: RBW = 100 kHz VCC = 3.5 V 5 dBm POUT 34.5 dBm
Min
Typical
Max
Units
Spurious
Spur
No parasitic oscillation > -36 dBm
Load Mismatch
Load
No module damage or permanent degradation
--
--
-82
Noise Power
PNOISE
At f0 + 10 MHz: RBW = 100 kHz VCC = 3.5 V 5 dBm POUT 34.5 dBm At 1805 to 1880 MHz: RBW = 100 kHz VCC = 3.5 V 5 dBm POUT 34.5 dBm
--
--
-76
dBm
--
--
-90
Coupling of 2nd and 3rd Harmonic from the EGSM Band into the DCS Band
2f0, 3f0
Measured at the DCS output, -15 dBm POUT 34 dBm
--
-25
-20
dBm
DCS Mode (f = 1710 to 1785 MHz and PIN = 5 to 11 dBm)
Frequency Range Input Power Analog Power Control Voltage f PIN VAPC POUT = 29.5 dBm VCC = 3.5 V POUT 31.5 dBm VAPC 2.0 V pulse width = 577 s duty cycle = 1:8 TCASE = +25 C BW = 3 MHz 0 dBm POUT 32 dBm VCC = 3.5 V VAPC 2.0 V TCASE = +25 C VCC = 2.9 V VAPC 2.6 V TCASE = -20 C to +100 C (See Table 2 for multi-slot) PIN = 5 dBm VCC = 4.8 V VAPC 2.6 V TCASE = -20 C to +100 C (See Table 2 for multi-slot) PIN = 5 dBm -- -- 1710 5 1.35 -- -- 1.7 1785 11 2.1 MHz dBm V
Power Added Efficiency
PAE
45
50
--
%
2nd to 7th Harmonics
2f0 to 7f0 POUT
-- 31.5
-- 32.0
-7 --
DBm
POUT MAX Output Power
29.5
30.5
-- DBm
POUT MAX
29.5
30.5
--
4
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PA Module for Dual-band EGSM900 DCS1800 / GPRS
Specifications(1) Table 3. CX77301 Electrical Specifications (1) (3 of 3)
Data Sheet * CX77301
Parameter
Input VSWR Forward Isolation
Symbol
IN POUT STANDBY
Test Condition
POUT = 0 to 32 dBm, controlled by VAPC PIN = 10.5 dBm VAPC = 0.3 V Time from POUT = -10 dBm to POUT = 0 dBm, 90%
Min
-- -- -- -- --
Typical
-- -40 10 5 2
Max
2:1 -35 12 8 5
Units
-- dBm
Switching Time
RISE, FALL
Time from POUT = -10 dBm to POUT = +20 dBm, 90% Time from POUT = -10 dBm to POUT = +31.5 dBm, 90% All combinations of the following parameters: VAPC = Controlled (3) PIN = min. to max. VCC = 2.9 V to 4.8 V Load VSWR = 8:1, all phase angles All combinations of the following parameters: VAPC = Controlled (3) PIN = Min. to Max. VCC = 2.9 V to 4.8 V Load VSWR = 10:1, all phase angles At f0 + 20 MHz: RBW = 100 kHz VCC = 3.5 V 0 dBm POUT 31.5 dBm At 925 to 960 MHz: RBW = 100 kHz VCC = 3.5 V 0 dBm POUT 31.5 dBm
s
Spurious
Spur
No parasitic oscillation > -36 dBm
Load Mismatch
Load
No module damage or permanent degradation
--
--
-80 dBm
Noise Power
PNOISE
--
--
-95
(1)
Unless specified otherwise: TCASE = -20 C to maximum operating temperature (see Table 2), RL = 50 , pulsed operation with pulse width 2308 s, duty cycle 4:8, VCC = 2.9 V to 4.8 V IC = 0A to xA, where x = current at POUT = 34.5 dBm, 50 load, and VCC = 3.5 V. lC = 0A to xA, where x = current at POUT = 32.0 dBm, 50 load, and VCC = 3.5 V.
(2) (3)
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Data Sheet * CX77301
PA Module for Dual-band EGSM900 DCS1800 / GPRS
Note 2 APC from PAC Note 2 BS in from Baseband 16 14 10 pF DCS / PCS IN 2 DCS / PCS OUT 12 APC IN
10 pF
CX77301
EGSM IN 4 33 pF
EGSM OUT
10
6 VCC1 drivers
8 VCC2 output stages Vbat
100 pF Note 1
Note 1 - Should be very close to PA module Note 2 - Optional depending on PAC circuit
10 nF Note 1
10 uF electrolytic
100956_003
Figure 2. Typical CX77301 Application
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PA Module for Dual-band EGSM900 DCS1800 / GPRS
Data Sheet * CX77301
PACKAGE DIMENSIONS AND PIN DESCRIPTIONS AND
Figure 3 displays the dimensions of the 16-pin leadless CX77301 dual-band PAM. Figure 4 provides a recommended phone board layout footprint for the PAM to help the designer attain optimum thermal conductivity, good grounding, and minimum RF discontinuity for the 50 ohm terminals. Figure 5 shows the device pin configuration, and Table 4 describes the pin names and signals.
(4.43) 2X 3.514
(0.465)
4X 1.905
( / 0.30) SOLDER MASK OPENING ( / 0.15) METAL PAD - PIN 1
MCM SUBSTRATE MOLD (3.33) 2X 2.261
4X 1.905 4X 3.81
A
1.50.1
0.025 A 0.08
A
4X R0.2
SIDE VIEW
SOLDER MASK OPENING
0.15 A B C
BOTTOM VIEW
11.64 B C
PIN 1 INDICATOR SOLDER MASK EDGES
0.1 A B C 2X R0.3 2X R0.2 1.145
0.9
0.145
METAL PAD EDGES
0.76 0.96 DETAIL PAD SCALE: 2X 3X THIS ROTATION 3X ROTATED 180 5X ROTATED 90 CW 5X ROTATED 90 CCW 0.10 A B C 0.05 A B C
9.14
A
TOP VIEW
NOTES: unless otherwise specified 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONING AND TOLERANCING IN ACCORDANCE WITH ASME Y14.5M-1994 3. SEE APPLICABLE BONDING DIAGRAM AND DEVICE ASSEMBLY DRAWING FOR DIE AND COMPONENT PLACEMENT. 4. PADS ARE METAL DEFINED. THE CENTER PAD IS SOLDER MASK DEFINED.
100956_004
Dimensions-16Figure 3. CX77301 Package Dimensions- 16-pin Module (All Views) Views)
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Data Sheet * CX77301
PA Module for Dual-band EGSM900 DCS1800 / GPRS
1.42 0.86
PIN 1 PIN 16
1.42 0.86
PIN 1 PIN 16
1.8 1 3.20 9.8
0.3
9.8
5.00
1.905
1.91
Component Outline
12.3
12.3 Component Outline
STENCIL APERTURE
TOP VIEW APPROACH 1
STENCIL APERTURE
TOP VIEW APPROACH 2
Common Ground Pad 1.32 0.05 ALL AROUND 0.762
PIN 1 PIN 16
1.42
PIN 16
0.86
PIN 1
9.70
4.5
9.8
1.905 TYP
1.91 TYP
4X 0.82 12.20 Component Outline 0.250 7 12.3 Component Outline SOLDER MASK OPENING
TOP VIEW
METALLIZATION
TOP VIEW
Thermal Via Array o 0.3 mm on 0.8 mm pitch / Additional vias will improve thermal performance. NOTE: Thermal vias should be tented and filled with solder mask, 30-35 m Cu plating recommended.
100956_014
Figure 4. Phone Board Layout Footprint for 9.1 mm x 11.6 mm Package
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PA Module for Dual-band EGSM900 DCS1800 / GPRS
Data Sheet * CX77301
BS GND 1 16
GND
APC 13 GND
15
14
DCS IN
2
12
DCS OUT
GND
3
11
GND
EGSMIN
4
10
EGSM OUT
6 GND 5 VCC1
7
8 9 GND
GND
VCC2
100956_002
Figure 5. CX77301 Package and Pin Configuration (Top View) Table 4. CX77301 Pin Names and Signal Descriptions
Pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 GND
Name
Ground RF input to DCS PA (DC coupled) Ground RF input to EGSM PA Ground Power supply for PA driver stages Ground Power supply for PA output stages Ground EGSM RF output (DC coupled) Ground DCS RF output (DC coupled) Ground Analog Power Control Ground Band select DCS IN GND EGSM IN GND VCC1 GND VCC2 GND EGSM OUT GND DCS OUT GND APC GND BS
Description
PACKAGE AND HANDLING INFORMATION
Because of its sensitivity to moisture absorption, this device package is baked and vacuum packed prior to shipment. Instructions on the shipping container label must be followed regarding exposure to moisture after the container seal is broken, otherwise, problems related to moisture absorption may occur when the part is subjected to high temperature during solder assembly. The SKY77301 is capable of withstanding an MSL 3/240 C solder reflow. Care must be taken when attaching this product, whether it is done manually or in a production solder reflow environment. If the part is attached in a reflow oven, the temperature ramp rate should not exceed 5 C per second; maximum temperature should not exceed 240 C. If the part is manually attached, precaution should be taken to insure that the part is not subjected to temperatures exceeding 240 C for more than 10 seconds. For details on attachment techniques, precautions, and handling procedures recommended by Skyworks, please refer to Application Note: PCB Design and SMT Assembly/Rework, Document Number 101752. Additional information on standard SMT reflow profiles can also be found in the JEDEC Standard J-STD-020B. Production quantities of this product are shipped in the standard tape-and-reel format. For packaging details, refer to Application
Note: Tape and Reel, Document Number 101568.
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Data Sheet * CX77301
PA Module for Dual-band EGSM900 DCS1800 / GPRS
ELECTROSTATIC DISCHARGE SENSITIVITY DISCHA RGE
The CX77301 is a Class I device. Figure 6 lists the Electrostatic Discharge (ESD) immunity level for each pin of the CX77301 product. The numbers for each pin in Figure 6 specify the ESD threshold level where the I-V curve between the pin and ground starts to show degradation. If ESD damage threshold magnitude
> +2000 V < -2000 V BS GND 1
is found to consistently exceed 2000 volts on a given pin, this so is indicated. If ESD damage threshold below 2000 volts is measured for either polarity, numbers are indicated that represent worst case values observed in product characterization.
> +2000 V < -2000 V APC GND 7
GND 8
1 16 15 14
13
> +2000 V DCS IN < -2000 V
2
12
DCS OUT
> +2000 V < -2000 V
GND 2
3
11
GND 6
+450 V EGSM IN -500 V
4
10
> +2000 V EGSM OUT < -2000 V
6 GND 3 5 VCC1 > +2000 V < -2000 V
7
8 9 GND 5
GND 4
VCC2 > +2000 V < -2000 V
100956_007
Figure 6. ESD Sensitivity Areas (Top View)
Various failure criteria can be utilized when performing ESD testing. Many vendors employ relaxed ESD failure standards which fail devices only after "the pin fails the electrical specification limits" or "the pin becomes completely nonfunctional". Skyworks employs most stringent criteria, fails devices as soon as the pin begins to show any degradation on a curve tracer.
To avoid ESD damage, both latent and visible, it is very important that the product assembly and test areas follow the Class-1 ESD handling precautions listed in Table 5.
ICTable 5. Precautions for Handling GaAs IC-based Products to Avoid Induced Damage
Personnel Personnel Grounding
Wrist Straps Conductive Smocks, Gloves and Finger Cots Antistatic ID Badges
Facility
Relative Humidity Control and Air Ionizers Dissipative Floors (less than 109 to GND)
Protective Workstation
Dissipative Table Tops Protective Test Equipment (Properly Grounded) Grounded Tip Soldering Irons Conductive Solder Suckers Static Sensors
Protective Packaging & Transportation
Bags and Pouches (Faraday Shield) Protective Tote Boxes (Conductive Static Shielding) Protective Trays Grounded Carts Protective Work Order Holders
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PA Module for Dual-band EGSM900 DCS1800 / GPRS
Data Sheet * CX77301
INFORMATION TECHNICAL INFORMATION
CMOS Bias Controller Characteristics The CMOS die within the PAM performs several functions that are important to the overall module performance. Some of these functions must be considered for development of the power ramping features in a 3GPP compliant transmitter power control loop.
The standards are available at http://www.3GPP.org/specs/specs.htm. http://www.3GPP.org/specs/specs.htm.
Power ramping considerations will be discussed later in this section. The four main functions that will be described in this section are Standby Mode Control, Band Select, Voltage Clamp, and Current Buffer. The functional block diagram is shown in Figure 7.
CommunicaPlease refer to 3GPP TS 05.05, Digital Cellular Communications System (Phase 2+); Radio Transmission and Reception. All GSM specifications are now the responsibility of 3GPP. 3GPP.
Band Select (pin 16)
vodcs
CComp
APC input (pin 14)
Supply (pin 6)
cpgsm
CComp
cpdcs
vogsm
Combinational Logic Voltage Clamp
Bandgap Reference
CMOS bias controller
DCS1800/ PCS1900 bias out ground GSM900 bias out
Cbypass
RF Isolation
Cbypass
RF Isolation
Dual Band GaAs Power Amplifier Die
100956_008
Figure 7. Functional Block Diagram
Standby Mode Control The Combinational Logic cell includes enable circuitry that monitors the APC ramping voltage from the power amplifier controller (PAC) circuit in the GSM transmitter. Typical handset designs directly connect the PA VCC to the battery at all times, and for some PA manufacturers this requires a control signal to set the device in or out of standby mode. The Skyworks PAM does not require a Transmit Enable input because it contains a standby detection circuit that senses the VAPC to enable or disable the PA. This feature helps minimize battery discharge when the PA is in standby mode. When VAPC is below the enable threshold voltage, the PA goes into a standby mode, which reduces battery current (ICC) to 6 A, typical, under nominal conditions.
For voltages less than 700 mV at the APC input (pin 14), the PA bias is held at ground. As the APC input exceeds the enable threshold, the bias will activate. After an 8 s delay, the amplifier internal bias will ramp quickly to match the ramp voltage applied to the APC input. In order for the internal bias to precisely follow the APC ramping voltage, it is critical that a ramp pedestal is set to the APC input at or above the enable threshold level with a timing at least 8 s prior to ramp-up. This will be discussed in more detail in the following section, "Power Ramping Considerations for 3GPP Compliance".
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Data Sheet * CX77301 Band Select The Combinational Logic cell also includes a simple gate arrangement that selects the desired operational band by activating the appropriate current buffer. The voltage threshold level at the Band Select input (pin 16) will determine the active path of the bias output to the GaAs die. Voltage Clamp The Voltage Clamp circuit will limit the maximum bias voltage output applied to the bases of the HBT devices on the GaAs die. This provides protection against electrical overstress (EOS) of the active devices during high voltage and/or load mismatch conditions. Figure 8 shows the typical transfer function of the APC input to buffer output under resistively loaded conditions. Notice the enable function near 600 mV, and the clamp acting at 2.15 V, corresponding to a supply voltage of 4.0 V.
PA Module for Dual-band EGSM900 DCS1800 / GPRS Current Buffer The output buffer amplifier performs a vital function in the CMOS device by transferring the APC input voltage ramp to the base of the GaAs power devices. This allows the APC input to be a high impedance port, sinking only 10 A, typical, assuring no loading effects on the PAC circuit. The buffers are designed to source the high GaAs base currents required, while allowing a settling time of less than 8 s for a 1.5 V ramp.
CONSIDERATIONS POWER RAMPING CONSIDERATIONS FOR 3GPP COMPLIANCE
These are the primary variables in the power control loop that the system designer must control: * software control of the DSP / DAC * software control of the transmitter timing signals * ramp profile attributes - pedestal, number of steps, duration of steps * layout of circuit / parasitics * RC time constants within the PAC circuit design All of these variables will directly influence the ability of a GSM transmitter power control loop to comply with 3GPP specifications. Although there is a specific time mask template in which the transmitter power is allowed to ramp up, the method is very critical. The 3GPP system specification for switching transients results in a requirement to limit the edge rate of output power transitions of the mobile. Switching transients are caused by the transition from minimum output power to the desired output power, and vice versa. The spectrum generated by this transition is due to the ramping waveform amplitude modulation imposed on the carrier. Sharper transitions tend to produce more spectral "splatter" than smooth transitions. If the transmit output power is ramped up too slowly, the radio will violate the time mask specification. In this condition, the radio may not successfully initiate or maintain a phone call. If the transmit output power is ramped up too quickly, this will cause RF "splatter" at certain frequency offsets from the carrier as dictated by the 3GPP specification. This splatter, known as Output RF Spectrum (ORFS) due to Switching Transients, will increase the system noise level, which may knock out other users on the system. The main difficulty with TDMA power control is allowing the transmitter to ramp the output power up and down gradually so switching transients are not compromised while meeting the time mask template at all output power levels in all operational bands. The transmitter has 28 s to ramp up power from an off state to the desired power level. The GSM transmitter power control loop generally involves feedback around the GaAs PA, which limits the bandwidth of signals that can be applied to the PA bias input. Since the PA is within the feedback loop, its own small-signal frequency response must exhibit a bandwidth 5 to 10 times that of the power control loop. As discussed in the previous section, the PA bias is held at ground for inputs less than 700 mV. As the APC input exceeds the enable threshold, the bias will activate. After
2.5
2.0
Base Bias (volts)
1.5
1.0
clamping occurs
0.5
0.0 0.0
0.5
1.0
1.5
2.0
2.5
3.0
APC Input (volts)
100956_009
VCC Figure 8. Base Bias Voltage vs. APC Input, V CC = 4.0 V
Due to output impedance effects, the bias of the GaAs devices increases as the supply voltage increases. The Voltage Clamp is designed to gradually decrease in level as the battery voltage increases. The performance of the clamp circuit is enhanced by the band gap reference that provides a supply-, process-, and temperature-independent reference voltage. The transfer function relative to VBAT is shown in Figure 9. For battery voltages below 3.4 V, the base bias voltage is limited by the common mode range of the buffer amplifier. For battery voltages above 3.4 V, the clamp limits the base bias.
2.6 2.5
clam p
Base Bias Clamp (Volts)
2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 3.00
3.25
3.50
3.75
4.00
4.25
4.50
Vcc (Volts)
100956_010
Figure 9. Base Bias Clamp vs. Supply Voltage
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PA Module for Dual-band EGSM900 DCS1800 / GPRS an 8 s delay, the amplifier internal bias will quickly ramp to match the ramp voltage applied to the VAPC input. Since the bias must be wide band relative to the power control loop, the ramp will exhibit a fast edge rate. If the APC input increases beyond 1 volt before the 8 s switching delay is allowed to occur after the bias is enabled, the PA will have significant RF output as the internal bias approaches the applied bias. During this ramp, the internal power control is running "open loop" and the edge rates are defined by the frequency response of the PA bias rather than that of the power control loop. This open loop condition will result in switching transients that are directly correlated to the PA bias bandwidth. Application of an initial APC voltage, which enables the bias at least 8 s before the VAPC voltage is ramped, will ensure that the internal bias of the PAM will directly follow the applied VAPC. As a result, the power control loop will define all edge transitions rather than the PA internal bandwidth defining the transition. Figure 10 and Figure 11 show the relationship of the internal bias relative to the applied APC in two cases. One case has ramping
1.6 1.4 1.2
Data Sheet * CX77301 starting from ground; the other case has ramping starting with an initial enable pedestal of 700 mV. It is evident that the pedestal level is critical to ensure a predictable and well behaved power control loop. To enable the CMOS driver in the PAM prior to ramp-up, a PAC output pedestal level to the APC input of the PAM (pin 14) should be set to about 700 mV. This pedestal level should have a duration of at least 8 s directly prior to the start of ramp up. Figure 12 shows typical signals and timings measured in a GSM transmitter power control loop. This particular example is at GSM Power Level 5, Channel 62. The oscilloscope traces are TxVCO_enable, PAC_enable, DAC Ramp, and VAPC (pin 14).
NOTE: When the TxVCO is enabled, the pedestal becomes set at the APC input of the PAM, then the PAC is enabled, and finally the DAC ramp begins.
The device specifications for enable threshold level and switching delay are shown in Table 3.
1.6
VAPC In (V) Internal Bias (V)
VAPC In (V)
1.4 1.2
Internal Bias (V)
Bias Voltage (V)
Bias Voltage (V)
0 5 10 15 20 25 30 35
1.0 0.8 0.6 0.4 0.2 0.0
1.0 0.8 0.6 0.4 0.2 0.0 0 5 10 15 20 25 30 35
Time (sec)
100956_011
Time (sec)
100956_012
10. Figure 10. PAM Internal Bias Performance - No Pedestal Applied
11. Figure 11. PAM Internal Bias Performance - Pedestal Applied
T
1
DAC Ramp
2
TxVCO_enable
PAC_enable 3 VAPC Ch1 Ch3 200 mV 1.00 V Ch2 Ch4
VAPC Pedestal
4
1.00 V 500 mV
BW M
10.0 s
A
Ch2
500 mV
100956_013
12. RampFigure 12. GSM Transmitter - Typical Ramp -up Signals
Skyworks Solutions, Inc. Proprietary Information
100956E [781] 376-7000 * FAX [781] 376-3100 * SALES@SKYWORKSINC.COM * WWW.SKYWORKSINC.COM
13
SEPTEMBER 19, 2003
ORDERING INFORMATION
Model Number
CX77301
Manufacturing Part Number
CX77301
Product Revision
-13
Package
9.1 x 11.6 x 1.5 mm
Operating Temperature
-20 xC to +100 xC
REVISION HISTORY
Revision
A B C D
Level
Date
June 2000 January 2001 March 2001 January 2, 2002 Initial Release Add: Tables 3,4 Revise: Figure 4.
Description
Add: ESD data, revised format to add chapter headings Add: Technical Information Section Revise: Functional Block Diagram; ESD data (+/- thresholds), Figure 10. New format Add: Figure 4 Revise: Figures 3, 5, 6
E
September 19, 2003
REFERENCES
Application Note: PCB Design and SMT Assembly/Rework, Document Number 101752 Application Note: Tape and Reel, Document Number 101568 JEDEC Standard J-STD-020B
(c) 2001-2003, Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products. These materials are provided by Skyworks as a service to its customers and may be used for informational purposes only. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to its products, specifications and product descriptions at any time, without notice. Skyworks makes no commitment to update the information and shall have no responsibility whatsoever for conflicts, incompatibilities, or other difficulties arising from future changes to its products and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as may be provided in Skyworks' Terms and Conditions of Sale for such products, Skyworks assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF SKYWORKSTM PRODUCTS INCLUDING WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. SKYWORKS FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS THAT MAY RESULT FROM THE USE OF THESE MATERIALS. SkyworksTM products are not intended for use in medical, lifesaving or life-sustaining applications. Skyworks' customers using or selling SkyworksTM products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. The following are trademarks of Skyworks Solutions, Inc.: SkyworksTM, the Skyworks symbol, and "Breakthrough Simplicity"TM. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. Additional information, posted at www.skyworksinc.com, is incorporated by reference.
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